QB_PH_SEC8_029: Semiconductor Devices & Diodes

Under reverse bias, a p-n junction exhibits a depletion layer capacitance $C_j$ that varies with the reverse bias voltage $V_R$ as

Correct Answer

### Step-by-Step Derivation & Verification: 1. **Depletion Region as a Parallel-Plate Capacitor**: $C_j = \frac{\varepsilon A}{W}$ where $W$ is the depletion layer thickness and $A$ is the junction area. 2. **Depletion Width from Poisson's Equation** (for an abrupt step junction): $W = \left[\frac{2\varepsilon (V_0 + V_R)}{e} \left(\frac{1}{N_A} + \frac{1}{N_D}\right)\right]^{1/2} \propto (V_0 + V_R)^{1/2}$ 3. **Junction Capacitance Formulation**: $C_j = \frac{\varepsilon A}{W} = A \left[\frac{e \varepsilon}{2(V_0 + V_R)} \left(\frac{N_A N_D}{N_A + N_D}\right)\right]^{1/2} \propto (V_0 + V_R)^{-1/2}$ 4. **Conclusion**: $C_j \propto (V_0 + V_R)^{-1/2}$. Option (A) is correct.